История изменений
Исправление steemandlinux, (текущая версия) :
Если сравнивать с core i7, то мало. snapdragon 4xx и 6xx по отношению к 8xx тоже самое, что и атом ко взрослым процессорам. В общем кастраты это:
Cortex A53:
8-stage pipelined processor with 2-way superscalar, in-order execution pipeline
DSP and NEON SIMD extensions are mandatory per core
VFPv4 Floating Point Unit onboard (per core)
Hardware virtualization support
TrustZone security extensions
64-byte cache lines
10-entry L1 TLB, and 512-entry L2 TLB
4 KiB conditional branch predictor, 256-entry indirect branch predictor
Cortex A57:
Pipelined processor with deeply out of order, speculative issue 3-way superscalar execution pipeline
DSP and NEON SIMD extensions are mandatory per core
VFPv4 Floating Point Unit onboard (per core)
Hardware virtualization support
Thumb-2 instruction set encoding reduces the size of 32-bit programs with little impact on performance.
TrustZone security extensions
Program Trace Macrocell and CoreSight Design Kit for unobtrusive tracing of instruction execution
32 KiB data (2-way set-associative) + 48 KiB instruction (3-way set-associative) L1 cache per core
Integrated low-latency level-2 (16-way set-associative) cache controller, 512 KB, 1 MB, or 2 MB configurable size per cluster
48-entry fully associative L1 instruction Translation Lookaside Buffer (TLB) with native support for 4 KiB, 64 KiB, and 1 MB page sizes
4-way set-associative of 1024-entry L2 TLB
2-level dynamic predictor with Branch Target Buffer (BTB) for fast target generation
Static branch predictor
Indirect predictor
Return stack
Исходная версия steemandlinux, :
Если сравнивать с core i7, то мало. snapdragon 4xx и 6xx по отношению к 8xx тоже самое, что и атом ко взрослым процессорам.