История изменений
Исправление fsb4000, (текущая версия) :
ARM === Advanced RISC Machine
И?
ARM вполне CISC
ARM is clearly CISC-y: variable length instructions, instructions that read/write multiple registers (push/pop), and a variety of odd instructions in Neon (floating point), just to name a few. These complex instruction crack into a variable number of ops, which is no-no in RISC.
loads/store pair, load/store with auto increment, arithmetic/logic with shifts, vector ld/st instructions in Neon to do strided reads/writes, etc. Again, fairly CISC-y. ARM instructions encode more information than say your typical DEC Alpha instruction; it’s closer to x86 than Alpha/SPARC in that sense.
Опять же есть кеш инструкций и декодер инструкций, вполне себе признак CISC.
Исходная версия fsb4000, :
ARM === Advanced RISC Machine
И?
ARM вполне CISC
ARM is clearly CISC-y: variable length instructions, instructions that read/write multiple registers (push/pop), and a variety of odd instructions in Neon (floating point), just to name a few. These complex instruction crack into a variable number of ops, which is no-no in RISC.
loads/store pair, load/store with auto increment, arithmetic/logic with shifts, vector ld/st instructions in Neon to do strided reads/writes, etc. Again, fairly CISC-y. ARM instructions encode more information than say your typical DEC Alpha instruction; it’s closer to x86 than Alpha/SPARC in that sense.