LMBench benchmark lat_mem_rd is used to measure observed memory access latency for external memory(DDR4/LPDDR4 on AM64x) and cache hits. The two arguments are size of of the transaction (64 in thescreenshot below) and the stride of the read (512). These two values are selected to measure the latency tocaches and external memory not the processor data prefetchers or other speculative execution. For someaccess patterns the prefetcing will work, but this benchmark is most useful to measure the case when it doesnot. The left column is the size of the data access pattern in megabytes, right column is the round trip readlatency in nanoseconds. As a summary for Arm Cortex-A53 latency to L1D is 3 ns, L2 latency is 14 ns, andaccess to DDR4 is 196 ns.